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10AX090N3F40I2LG 0.87V ALTERA FPGA Chip

Categories ALTERA FPGA Chip
Brand Name: Intel / Altera
Model Number: 10AX090N3F40I2LG
Certification: Lead free / RoHS Compliant
MOQ: 1 pcs
Price: USD 7000-8000 pcs
Payment Terms: T/T, Western Union, Paypal, Trade Assurance, Credit Card
Supply Ability: 118 pcs
Delivery Time: 3-5 Day
Packaging Details: International Standard Packaging
Category: IC FPGA
Condition: Original 100%,Brand New and Original,New
Voltage - Supply: 0.87V ~ 0.93V
Operating Temperature: -40°C ~ 100°C (TJ)
Package / Case: FBGA-1517
Number of LABs/CLBs: 339620
Series: Arria 10 GX 900
Number of Logic Elements/Cells: 900000
Service: BOM Kitting
Lead time: In Stock,contact us
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10AX090N3F40I2LG 0.87V ALTERA FPGA Chip

10AX090N3F40I2LG ALTERA FPGA Chip FBGA-1517 Arria 10 GX 900


TYPE
DESCRIPTION
Category
Embedded - FPGAs (Field Programmable Gate Array)
Mfr
Intel
Series
Arria 10 GX
Package
Tray
Part Status
Active
Voltage - Supply
0.87V ~ 0.93V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C (TJ)
Package / Case
1517-BBGA, FCBGA
Supplier Device Package
1517-FCBGA (40x40)
Number of LABs/CLBs
339620
Number of Logic Elements/Cells
900000
Total RAM Bits
59234304
Number of I/O
600

Summary of Intel Arria 10 Features
• TSMC's 20-nm SoC process technology
• Allows operation at a lower VCC level of 0.82 V instead of the 0.9 V standard VCC core voltage
• 1.0 mm ball-pitch Fineline BGA packaging
• 0.8 mm ball-pitch Ultra Fineline BGA packaging
• Multiple devices with identical package footprints for seamless migration between different FPGA densities
• Devices with compatible package footprints allow migration to next generation high-end Stratix® 10 devices
• RoHS, leaded(1), and lead-free (Pb-free) options
• Enhanced 8-input ALM with four registers
• Improved multi-track routing architecture to reduce congestion and improve compilation time
• Hierarchical core clocking architecture
• Fine-grained partial reconfiguration
• M20K—20-Kb memory blocks with hard error correction code (ECC)
• Memory logic array block (MLAB)—640-bit memory
• Native support for signal processing precision levels from 18 x 19 to 54 x 54
• Native support for 27 x 27 multiplier mode
• 64-bit accumulator and cascade for systolic finite impulse responses (FIRs)
• Internal coefficient memory banks
• Preadder/subtractor for improved efficiency
• Additional pipeline register to increase performance and reduce power

• Supports floating point arithmetic:
— Perform multiplication, addition, subtraction, multiply-add, multiply-subtract, and complex multiplication.
— Supports multiplication with accumulation capability, cascade summation, and cascade subtraction capability.
— Dynamic accumulator reset control.
— Support direct vector dot and complex multiplication chaining multiply floating point DSP blocks.



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